Top "Xilinx" questions

Xilinx is a major brand of Field Programmable Gate Arrays (FPGA) and CPLDs (Complex Programmable Logic Devices)

Conversion from numeric_std unsigned to std_logic_vector in vhdl

I have a question related to conversion from numeric_std to std_logic_vector. I am using moving average filter …

vhdl fpga xilinx hdl intel-fpga
how to solve 4 bit full adder verilog

I am supposed to create 4 bit full adder verilog code in vivado.But when I try to test in the …

xilinx vivado
Error in VHDL (Xilinx): failed to link the design

why I get error in VHDL for this? Also, sometimes: cannot do process as a process failed previously? Many thanks.

vhdl xilinx
Read a specific memory address via /dev/mem from the command line

For context, programming a driver to interact with an FPGA IP core on an embedded Linux (Yocto: krogoth) on a …

embedded-linux yocto xilinx
Type conversion in VHDL: real to integer - Is the rounding mode specified?

While debugging the handling of user defined physical types in Vivado (read more), I found a different behavior for type …

type-conversion vhdl xilinx xilinx-ise vivado
How to launch Xilinx ISE Web Pack under Ubuntu?

I've downloaded and successfully installed Xilinx ISE Web Pack 14.4 on Ubuntu 12.10 although I'm unable to launch it.

fpga xilinx
Programming VHDL on Linux?

Anyone knows good environment to program VHDL and simulate it (don't matter Xilinx or Altera) using Linux?

linux vhdl xilinx intel-fpga
How to add a Linux kernel driver module as a Buildroot package?

I am currently building an Embedded Linux for my Zybo Board from Xilinx. For this I use Buildroot. Now I …

c embedded-linux xilinx buildroot
Printing signed integer value stored in a variable of type reg

How do I print a signed integer value stored in an 8-bit register declared as: reg [7:0] acc; Using: $display("acc : %…

verilog xilinx
How to initialize contents of inferred Block RAM (BRAM) in Verilog

I am having trouble initializing the contents of an inferred ram in Verilog. The code for the ram is as …

verilog fpga xilinx vivado