Top "Fpga" questions

Error adding std_logic_vectors

I wanna have a simple module that adds two std_logic_vectors. However, when using the code below with the + …

vhdl fpga

What does "others=>'0'" mean in an assignment statement?

cmd_register: process (rst_n, clk) begin if (rst_n='0') then cmd_r<= (others=>'0'); …

if-statement process vhdl fpga

How can the linux kernel be forced to enumerate the PCI-e bus?

Linux kernel 2.6 I've got an fpga that is loaded over GPIO connected to a development board running linux. The fpga …

linux configure fpga pci-e

What are some practical applications of an FPGA?

I'm super excited about my program powering a little seven-segment display, but when I show it off to people not …

logic fpga digital

Can you program FPGAs in C-like languages?

At university I programmed a FPGA in a C-like language. However, I also know that one usually programs FPGAs in …

fpga

CUDA or FPGA for special purpose 3D graphics computations?

I am developing a product with heavy 3D graphics computations, to a large extent closest point and range searches. Some …

hardware cuda fpga

Passing parameters to Verilog modules

I am in the process of writing some Verilog modules for an FPGA design. I looked around the internet to …

module verilog fpga parameterization

Neural Network simulator in FPGA?

To learn FPGA programming, I plan to code up a simple Neural Network in FPGA (since it's massively parallel; it's …

neural-network fpga

Conversion from numeric_std unsigned to std_logic_vector in vhdl

I have a question related to conversion from numeric_std to std_logic_vector. I am using moving average filter …

vhdl fpga xilinx hdl intel-fpga

Approximate e^x

I'd like to approximate the ex function. Is it possible to do so using multiple splines type based approach? i.…

math optimization fpga