Top "Intel-fpga" questions

Can't infer register for ... at ... because it does not hold its value outside the clock edge

This must be the most common problem among people new to VHDL, but I don't see what I'm doing wrong …

vhdl fpga intel-fpga

wait statement must contain condition clause with UNTIL keyword

The following VHDL is to be used to test bench. I keep getting an error on the first wait statement …

vhdl intel-fpga quartus

Creating a frequency divider in VHDL

MAJOR EDIT: Problem was solved after reading Will Dean's comment. The original question is below the revised code: -- REVISED …

vhdl intel-fpga

ps/2 keyboard interface VHDL

Alright so I'm trying to implement a keyboard controller for use with an altera DE2 FPGA board, and am having …

keyboard vhdl fpga intel-fpga ps2

Unable to lock chain (Insufficient port permissions)

I am new to Linux , and I am trying to install AlteraQuartus 2 WEb Edition and NIOS2 EDS to play with …

linux embedded embedded-linux intel-fpga

Nios 2 "Hello World"?

I've managed to run a complicated project on the Nios 2 Altera DE2 board where I created a timer with assembly …

c fpga intel-fpga nios

How to concatenate strings with integer in report statement?

I'm having trouble getting the following report statement to work: report "ERROR: instruction address '" & CONV_INTEGER(a(7 downto 2)) &…

vhdl modelsim intel-fpga quartus