Top "Cpu-architecture" questions

The hardware microarchitecture (x86, x86_64, ARM, ...) of a CPU or microcontroller.

How does direct mapped cache work?

I am taking a System Architecture course and I have trouble understanding how a direct mapped cache works. I have …

caching system cpu-architecture
FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2

I'm confused on how many flops per cycle per core can be done with Sandy-Bridge and Haswell. As I understand …

cpu intel cpu-architecture avx flops
Temporal vs Spatial Locality with arrays

I am a little confused on the meanings of spatial and temporal locality. I'm hoping by looking at it with …

arrays caching cpu-architecture cpu-cache
Why is a boolean 1 byte and not 1 bit of size?

In C++, Why is a boolean 1 byte and not 1 bit of size? Why aren't there types like a 4-bit or 2…

c++ boolean byte cpu-architecture abi
After update to Xcode 5 - ld: symbol(s) not found for architecture armv7 or armv7s linker error

I just updated my iPhone 4S software to iOS 7 Beta 2 while I was in the middle of putting the final …

cordova static-libraries cpu-architecture ios7 xcode5
Difference between word addressable and byte addressable

Can someone explain what's the different between Word and Byte addressable? How is it related to memory size etc.?

memory operating-system cpu-architecture
Is x86 RISC or CISC?

According to Wikipedia, x86 is a CISC design, but I also have heard/read that it is RISC. What is …

x86 cpu cpu-architecture
What is the difference between x64 and IA-64?

I was on Microsoft's website and noticed two different installers, one for x64 and one for IA-64. Reference:Installing the .…

64-bit x86-64 cpu-architecture itanium
Difference between physical addressing and virtual addressing concept

This is a re-submission, because I am not getting any response from superuser.com. Sorry for the misunderstanding. I need …

memory-management cpu-architecture
How many CPU cycles are needed for each assembly instruction?

I heard there is Intel book online which describes the CPU cycles needed for a specific assembly instruction, but I …

performance assembly x86 cpu-architecture cpu-cycles