Time stamp in VHDL

vhdl fpga
Digeek picture Digeek · Dec 3, 2013 · Viewed 11.5k times · Source

is there any function in VHDL which is used to get current simulation time at which a process is running? May be same like the function in systemC sc_time_stamp()

Answer

Russell picture Russell · Dec 3, 2013

Yes there is. Use the keyword now.

You can print the simulation time using VHDL Attributes:

report "current time = " & time'image(now);

You can also store the current time to a variable:

variable v_TIME : time := 0 ns;
v_TIME := now;
-- STUFF HAPPENS
v_TIME := now - V_TIME; --used to find delta time

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