Type vs Subtype and down vs to for Integers in VHDL

vhdl
newprint picture newprint · Sep 22, 2012 · Viewed 9.2k times · Source

What is the difference between type and subtype in VHDL and where should I use them ?

My understanding is that subtype is just narrowed down version of one of the primary types, such as integer: subtype small_integer is integer range -128 to 127; All the operations possible on primary type, are also possible on subtypes(of course, with certain limitations) . Also, it is better to use subtypes to prevent errors.

So what is the purpose of the type ?

What is the difference between donwto and to for the integers ? (To get the point across, here is an example)
subtype bit_index is integer range 31 downto 0;
subtype bit_index is integer range 0 to 31;

Thanks !

Answer

BennyBarns picture BennyBarns · Sep 24, 2012

  • As you correctly say, a type is the base for subtypes; without type there is no subtype. However, subtypes are only safer in simulation; in real hardware, there are no boundary checks etc...

  • The standard library of VHDL defines a number of base types for you to build upon, like std_logic, std_ulogic, integer, character, std_logic_vector (unconstrained) and so on. Your own definitions like std_logic_vector(7 downto 0) create a subtype indirectly (or directly if you define and name your subtypes explicitly)

  • When you are looking at your own enumerations, e.g., when describing the states of a state machine, you need a type:

    type tState is (IDLE, DO_SOMETHING, DONE);

  • I am not sure about the downto and to for the integers, it seems useless, but VHDL simply does not have another mechanism to define a range, and this mechanism allows both to and downto

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