Can I use a wire inside an always block? Like for example:
wire [3:0]a;
assign a=3;
always @(c)
begin
d=a+c;
end
It got compiled without throwing any error. Why?
Yes, you can use a wire's value inside an always block, you just can not assign a value to a wire in always or initial block.
The only real difference between a wire and reg is the syntax for assigning values.
In the above example d could also have been created as a wire, these are equivalent:
reg [3:0] answer_reg;
always @* begin
answer_reg = a + c;
end
wire [3:0] answer_wire;
assign answer_wire = a + c;