Can we have an array of instances for a custom module?
For example: we can have input [15:0] a;
- this creates a bus. Can we do same thing for custom modules, i.e. DFF [15:0] d;
, where DFF is a custom module?
Here I intend to create 16 instances of the DFF module.
Verilog arrays of instances were added in Verilog-1995 (IEEE 1364-1995). They can be used with gates, user-defined primitives, and modules. Generates, which are more powerful but also more complex, were added in Verilog-2001.
Here is an example array of module instances:
DFF d[15:0] (clk, DFF_i, DFF_o);
For each port connection, if the size matches that of the formal parameter then it is connected to every instance. Otherwise each instance is connected to a part-select (or bit-select) of the expression.