Top "Memory-fences" questions

A memory barrier is a special processor instruction that imposes restrictions on the order in which memory accesses become visible to other processors/cores in a multi-processor or multi-core system.

What is a memory fence?

What is meant by using an explicit memory fence?

concurrency memory-fences
When are x86 LFENCE, SFENCE and MFENCE instructions required?

Ok, I have been reading the following Qs from SO regarding x86 CPU fences (LFENCE, SFENCE and MFENCE): Does it …

multithreading assembly x86 cpu memory-fences
In OpenCL, what does mem_fence() do, as opposed to barrier()?

Unlike barrier() (which I think I understand), mem_fence() does not affect all items in the work group. The OpenCL …

opencl gpgpu memory-barriers barrier memory-fences
What is the difference between using explicit fences and std::atomic?

Assuming that aligned pointer loads and stores are naturally atomic on the target platform, what is the difference between this: // …

c++ c++11 atomic memory-fences