Parallel makefile requires dependency ordering

kyku picture kyku · Dec 13, 2011 · Viewed 19.1k times · Source

I have the following piece of makefile:

CXXFLAGS = -std=c++0x -Wall
SRCS     = test1.cpp test2.cpp
OBJDIR   = object
OBJS     = $(SRCS:%.cpp=$(OBJDIR)/%.o)

all: test1 
release: clean test1

test1: $(OBJS)
    $(CXX) -o $@ $(OBJS)

$(OBJDIR)/%.o: %.cpp
    $(CXX) $(CXXFLAGS) -MD -c -o $@ $<

-include $(SRCS:.cpp=.d)

clean:
    rm -rf $(OBJDIR)/*

.PHONY: all clean release 

Now if I try to invoke "make -j4 release" the clean target often gets execute in the middle of building files which causes compilation to fail. My question is how to ensure that the clean target has completed before starting the release build.

Answer

Neil picture Neil · Dec 13, 2011

My preference is for

release:
    $(MAKE) clean
    $(MAKE) test1

This forces the two targets to be made consecutively without disturbing their inner parallelism (if any).