Difference between register indirect and base plus offset in MIPS addressing mode?
What is the difference between register indirect and base plus offset, and how does it affect how you write assembly on the MIPS architecture? I think it means that you can only reference the register in an instruction, and that register has to point to more instructions?
Answer
"Register indirect" addressing means that the address which will be used by the instruction (known as the "effective address") is taken from the contents of a register, rather than being encoded directly within the instruction itself (which is "absolute" addressing). MIPS has jump instructions for both of these addressing modes:
j 0x1234
means "jump to address 0x1234" (absolute addressing), whereas
jr $ra
means "jump to the address contained in the $ra register" (register indirect
addressing).
"Base plus offset" addressing means that a base address is taken from the contents of a register, and then an offset (which is encoded in the instruction itself) is added. MIPS uses this addressing mode for loads and stores. For example:
lw $t0, 0($a0)
lw $t1, 4($a0)
...if $a0 contains 0x1234, then $t0 will be loaded with the word at
address 0x1234 (the effective address is the contents of the register, plus
an offset of 0), and $t1 will be loaded with the word at address 0x1238
(the effective address is the contents of the register, plus an offset of 4).
As you can see, when the offset is 0, this is equivalent to register indirect addressing.